However this time I had a new trick up my sleeve. I then recreated the diagram in dip trace. I redid all the logic design portion as well making liberal use of logic Friday. When V1 failed it was nearly a year before tried again. This was fixable though and some tedious soldering later it LIVES! Remember kids always triple check your work. Sure enough I had reversed the foot print. I never connected the DP to any thing, left it floating. But then I noticed that the decimal point would light up in some positions. My worst fear was an issue with the core logic circuits and it seems that seemed to be what the issue was. I saved the though hole parts for last and I was ready to see if it worked! It's tedious but so far I've always gotten good results with it. My method of SMD work is sticking the parts down with solder paste (I have a syringe of it I use) and then using a hot air gun to melt it. Being impatient I got started on it immediately. There's just some thing about holding a board that you designed. For any one new these are simply 2N3904 BJT transistors. On the left you have the old gate design and the right is the gate plus a buffer. This double the part count but with a board this size, (I esitmate 15-30 inches) I want it to work the first time! I'm simply attaching an LED buffer to each gate. I thought of several ways to accomplish this but I settled on the most reliable option. She is interested in a though hole version that ideally will show the individual logic state of each gate. I showed V2 to the professor who teaches the digital logic classes, a class I took and was able to apply to this project. I never planed to make a 3rd version but I might have a opportunity though my college to make a more educational version. I'm going to experiment with lower values and see if the max effective speed changes. Currently I am using NAND gates pulled high with a 10K resistor. It could be some sort of harmonic effect but the frequency of the noise seemed independent of the input frequency.Īt 50KHz the wave form gets a bit nasty and I deem this the max effective frequency. I observed some odd 50KHz oscillation on the positive portion of the signal when I drove it at 10Khz. I attached my scope to the gate of this transistor and simply feed increasingly high speed signals into it. This produced a path 5 gates long untill the path reached the buffer or F segment driver for the display. To test this I attached my function gen to the 8th's position on the input of Bit 3 depending on how you describe it. With this in mind I was curious to find out the max effective speed of the decoder. 7-Segment display are mostly used in digital clocks, electronic meters, odometers as well as LCD application due to low current consumption.Part of the purpose of this project was to act as a testing ground for future projects made out of discrete logic. ![]()
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